文档介绍：LOW-POWER SYSTEMS-ON-CHIP
Bus encoding architecture for low-power
implementation of an AMBA-based SoC platform
S. Osborne, . Erdogan, T. Arslan and D. Robinson
Abstract: Advanced microcontroller bus architecture (AMBA) is rapidly ing the de facto
standard for new system-on-chip (SoC) designs. The bus protocol plex, making any
peripherals that can interface to it valuable intellectual property (IP). This paper presents a low-
power bus encoding architecture which is able to deal with plex advanced high-
performance bus (AHB) protocol within AMBA, which involves multiple burst transfers. The
architecture is targeted for a low-power SoC platform to be used in a miniaturised low power
application area. The paper describes the SoC platform and the bus encoding architecture, and
provides results with a design synthesised at mm CMOS technology indicating up to 22%
power saving.
1 Introduction external pin is typically larger than that of an internal node
by 2–3 orders of magnitude. The model must, therefore, be
For CMOS circuits, most dynamic power dissipated is for further shaped to take account of this, as shown in the
charging and discharging node capacitances. Dynamic following [1]:
power dissipated by a CMOS circuit is of the form [1]:
P Pchip / Cint*N(transitions)int þ Cext*N(transitions)I=O ð3Þ
N
P / C V 2 f pt ð1Þ
chip loadi * dd* * i