文档介绍:通信原理软件实验
2PSK/PCM调制与解调
组别:
姓名:
学号:
通信工程学院 1301051班
三、实验简明原理
(一)2PSK
在2PSK中,通Noise
Std Dev = 0 v
Mean = 0 v
Max Rate = 560e+3 Hz
3
Operator: Linear Sys
Butterworth Bandpass IIR
3 Poles
Low Fc = 12e+3 Hz
Hi Fc = 36e+3 Hz
Quant Bits = None
Init Cndtn = Transient
DSP Mode Disabled
Max Rate = 560e+3 Hz
6
Multiplier:Non Parametric
Inputs from t15p0 t3p0
Outputs to 8 24
Max Rate = 560e+3 Hz
8
Operator: Linear Sys
Butterworth Lowpass IIR
3 Poles
Fc = 12e+3 Hz
Quant Bits = None
Init Cndtn = Transient
DSP Mode Disabled
Max Rate = 560e+3 Hz
Aperture Jitter = 0 sec
Max Rate = 280e+3 Hz
10
Operator: Delay
Non-Interpolating
Delay = 0 sec
= smp
Output 0 = Delay t9
Output 1 = Delay - dT
Max Rate (Port 0) = 560e+3 Hz
9
Operator: Sampler
Interpolating
Rate = 120e+3 Hz
Aperture = 0 sec
Aperture Jitter = 0 sec
Max Rate = 120e+3 Hz
(二)PCM
1、系统模型
2、图符模块参数
编号
库/名称
参数
0
Source: Sinusoid
Amp = 2 v
Freq = 900 Hz
Phase = 0 deg
Output 0 = Sine t3
Output 1 = Cosine
Max Rate (Port 0) = 300e+3 Hz
1
Source: Sinusoid
Amp = 2 v
Freq = 300 Hz
Phase = 0 deg
Output 0 = Sine t3
Output 1 = Cosine
Max Rate (Port 0) = 300e+3 Hz
2
Source: Sinusoid
Amp = 2 v
Freq = 600 Hz
Phase = 0 deg
Output 0 = Sine t3
Output 1 = Cosine
Max Rate (Port 0) = 300e+3 Hz
3
Adder: Non Parametric
Inputs from t0p0 t1p0 t2p0
Outputs to 4 6
Max Rate = 300e+3 Hz
6
Comm: Compander
A-Law
Max Input = ±5
Max Rate = 300e+3 Hz
8
Logic: ADC
Two's Complement
Gate Delay = 0 sec
Threshold = 500e-3 v
True Output = 1 v
False Output = 0 v
No. Bits = 8
Min Input = -5 v
Max Input = 5 v
Rise Time = 0 sec
Analog = t6 Output 0
Clock = t14 Output 0
9
Logic: DAC
Two's Complement
Gate Delay = 0 sec
Threshold = 500e-3 v
No. Bits = 8
Min Output = -5 v
Max Output = 5 v