文档介绍：FPGAFPGA ChallengesChallenges andand
OpportunitiesOpportunities
Prof. Stephen Brown
University Program Director
Altera
© 2009 Altera Corporation
AlteraAltera StratixStratix IVIV GXGX
40 nm: billion transistors
2 © 2009 Altera Corporation Altera, Quartus & Stratix are Reg. . Pat. & Tm. Off. and Altera marks in and outside the .
WhyWhy FPGAsFPGAs useuse thethe LatestLatest TechnologyTechnology
Each new transistor technology:
130 nm, 90 nm, 65 nm, 40 nm, 28 nm →
~2X transistors
− More logic elements, more RAM, more DSP blocks, …
− More processing on one chip
Æ Lower system cost & power
Æ Enable higher performance systems
− New features:
Æ High-speed serial I/O, memory interfaces, hard IP
3 © 2009 Altera Corporation Altera, Quartus & Stratix are Reg. . Pat. & Tm. Off. and Altera marks in and outside the .
WhyWhy ASICsASICs Don’t!Don’t!
Standard cell ASIC @ 40 nm
−~$4 M / mask set * 2 spins = $8 M
− Test & product engineering ~$7 M
− Design, verification, software ~$25 M
Economics
−$40 M development cost
− 20% of revenue on R & D Æ need $200 M revenue
− 10% market share Æ Need a $2 B market
Result
− Falling ASIC starts: most still in 130 nm and above
− Structured ASICs
− ASICs increasing programmability Æ try to increase market size
4 © 2009 Altera Corporation Altera, Quartus & Stratix are Reg. . Pat. & Tm. Off. and Altera marks in and outside the .
FPGAsFPGAs areare ProcessProcess LeadersLeaders
Altera Stratix IV
− Shipped in 2008
− First 40 nm FPGA & one of the first 40 nm chips
z FPGA designed simultaneously with 40 nm process
− 3 years & >$200 million to develop hardware +
software + IP
− Process driver: large & regular; contains logic & RAM
− 40 nm allows integration of new hard (“ASIC”)
functions
Pipelined development
− 28 nm underway for two years
5 © 2009 Altera Corporation Altera, Quartus & Stratix are Reg. . Pat. & Tm.