文档介绍：合肥工业大学
硕士学位论文
超大规模集成电路容软错技术研究
姓名:王俊
申请学位级别:硕士
专业:计算机系统结构
指导教师:梁华国
2011-04
超大规模集成电路容软错技术研究
摘要
随着超大规模集成电路广泛应用于各个领域,集成电路工艺的深入,系统
功能更加复杂,系统在设计和运行阶段不可避免地会受到环境或人为因素的干
扰,高可靠系统的开发和研究成为今后集成电路设计必须面临的挑战和主要趋
势。软错误是集成电路特征尺寸进人纳米量级后,威胁可靠性的重要因素之一。
本文以提高超大规模集成电路系统的可靠性为出发点,针对软错误,对容错技
术进行了研究,主要工作如下:
1、学习软错误的相关概念和近年来与本文有关的研究成果。详细介绍了软
错误的产生原理和数学模型,分析并比较了现有组合逻辑容错技术和有限状态
机拆分技术的动机、方法和优缺点。
2、针对单事件瞬态,提出了一种对面积开销有效的组合逻辑选择性加固方
案。利用 BFIT 工具估算出组合逻辑每个节点对单事件瞬态的软错误率,选择软
错误率较高的节点用 CWSP 单元加固,最终实现了面积和可靠性之间的有效折
中。实验结果表明,增加 %-%的面积开销可以使软错误率降低
50%-99%,该方案能应用于对硬件开销较严格的商业应用。
3、针对单事件翻转,提出了一个支持内建自测试的串行自恢复控制器结构。
将有限状态机通过串行拆分技术拆分成一个子状态机串行连接的结构,并将其
与回卷恢复和内建逻辑块观察器相结合。回卷最后一级子状态机便能实现自恢
复,减少了自恢复的时间,对每个子状态机单独进行测试,降低了测试复杂度。
回卷恢复与内建自测试共享寄存器组,进一步降低了面积开销。
关键词:容错;软错误;选择性加固;有限状态机拆分
I
Research on Soft Error Tolerant VLSL
ABSTRACT
With the wide application of VLSI in various fields, the deepening of IC
technology, the plication of system function, systems are disturbed
inevitably by environment or human causes in design and operation period. The
development and research of high reliable systems es a required challenge
and a major trend of IC Design in the future. Soft error has been one of the most
important factors threatening reliability, since the feature size of IC gets into
nanometer. With improving the reliability of VLSI systems as a starting point, the
research of fault-tolerant technologies for soft errors is carried out in this thesis,
and the major work is as follows:
Firstly, the related concepts of soft error and research achievements in recent
years are studied. The generation principle and mathematical models of soft error
are introduced in detail, and the binational logic fault-tolerant
technologies as well as FSM position technologies are analyzed and
compared in their motivations, methods, advantages and disadvantages.
Secondly, for SET, an effective selective hardening scheme binational
logic for area overh